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Power everything with a single chip
XMOS xcore® — A next-generation SoC that integrates AI, DSP, control, and I/O on a single chip
Current: xcore.ai (XU316) — Available now
Next generation: Generative System-on-Chip (GenSoC) — Planned for phased release from 2026 onward
AI, DSP, real-time control, and software-defined I/O are condensed into a single chip . The XMOS xcore® architecture dramatically reduces product development time and cost while guaranteeing nanosecond-level deterministic real-time performance . Silicon Technology Co., Ltd. provides this trusted platform, backed by more than 35 million units shipped worldwide, with Japanese-language support.
cumulative shipments* Figure announced by XMOS
(2 tiles × 8)
(XU316 / 800 MHz grade)
timing guarantee
1. What is XMOS xcore®? — Fundamental differences from conventional chips
XMOS is a semiconductor company from Bristol, UK. Its core product, the xcore® architecture fundamentally changes conventional assumptions about SoC design. In typical embedded-system design, dedicated chips are required for AI processing, audio DSP, motor control, and communication interfaces (I/O), and these must be connected with complex wiring and software.
XMOS xcore® integrates these four roles into a single programmable SoC . In addition, the Generative System-on-Chip (GenSoC) platform announced in 2025 envisions a new development experience that may include natural-language-based design assistance in the future (roadmap features under development; official availability timing will be released in phases).
A chip that lets functions once fixed in hardware be freely defined and changed through software and AI. Even after product release, functions can be added or changed through reprogramming, protecting long-term hardware investments.
Defined I/O
latency
128 GPIO
Comparison with conventional approaches
| Comparison point | Conventional multi-chip configuration | XMOS xcore.ai |
|---|---|---|
| Development period | Several months to several years | Significantly shortened with xcore.ai |
| Number of chips | AI chip + DSP + MCU + I/O controller... | Completed with a single xcore® chip |
| Real-time performance guarantee | Jitter occurs in inter-chip communication | Deterministically guaranteed at nanosecond scale |
| Function changes after release | Hardware redesign required | Handled by software only |
| BOM cost | Many components and inventory items required | Significantly reduces component count |
2. Current platform — xcore.ai (available now)
XMOS’s current flagship product is xcore.ai (XU316). It is a production-proven platform with more than 35 million units shipped worldwide, integrating AI, DSP, software-defined I/O, and real-time control on a single chip. It is a de facto standard in smart speakers, professional audio, and industrial IoT, and evaluation boards are available now.
XU316 evaluation boards and production devices are available from Silicon Technology Co., Ltd. with Japanese-language support. For the next-generation Generative System-on-Chip(GenSoC) dedicated section at the bottom of this page for more information.
3. Key functions of xcore.ai (current product)
The xcore.ai platform runs four core functions in full synchronization on a single chip. Each function is executed as an independent thread and coordinated with nanosecond-level deterministic timing.
Runs speech recognition, image classification, anomaly detection, and wake-word detection on-chip. It enables low-latency inference without an external AI chip while helping protect privacy. Edge AI inference performance: up to 51.2 GMACC/s (800 MHz grade)* Figure announced by XMOS。
Beamforming, active noise cancellation, echo cancellation, and dereverberation can be implemented entirely in software. Ideal for smart speakers, professional audio, and in-vehicle voice systems.
A wide range of interfaces, including USB Audio Class 2.0, MIPI D-PHY (FB265/TQ128 only), I2S, SPI, I2C, and PDM, can be defined and changed in software. This provides flexibility for requirement changes after release.
The xcore® parallel architecture guarantees nanosecond-level deterministic execution without interrupts. Ideal for timing-critical applications such as motor control, sensor fusion, and safety systems.
xcore.ai (XU316) — Flagship multicore SoC
Integrates AI inference, DSP, USB audio, and real-time control on a single chip. Its 16-core / 2,400–3,200 MIPS deterministic architecture guarantees ultra-low latency and ultra-low jitter.
4. Main application areas
xcore.ai is used across applications that require both intelligence and real-time processing, from voice AI to robotics and automotive systems. It has been adopted in global smart speakers, professional audio equipment, and industrial robots, with more than 35 million units shipped.
5. About Silicon Technology Co., Ltd.
Silicon Technology Co., Ltd. is an official authorized distributor in Japan of XMOS Ltd. (UK), providing consistent support from evaluation-board procurement to supply of production devices.
🔬 Platform silicon
XMOS xcore® platform silicon family. It integrates AI, DSP, real-time control, and software-defined I/O on a single chip. This trusted platform has shipped more than 35 million units worldwide. Evaluation samples and production devices are available from Silicon Technology Co., Ltd.
* Next-generation Generative System-on-Chip (GenSoC) is planned for phased release from 2026 onward (roadmap stage).Details here →
xcore.ai — XU316
xcore.ai flagship / AI + DSP + USB Audio
16 logical cores, 600–800 MHz. Runs AI inference, multichannel DSP, USB Audio Class 2.0, and real-time control concurrently on a single chip. A de facto standard for smart speakers, professional audio, and industrial IoT.
Generative System-on-Chip (GenSoC)
The next-generation intelligent embedded platform defined by XMOS
In 2025, XMOS officially defined its next generation as “Generative System-on-Chip(GenSoC).”new silicon distinct from the current xcore.ai (XU316) is planned for phased release from 2026 onward (roadmap stage). A new development experience is envisioned, including natural-language-based design assistance. The next-generation architecture is being considered for compatibility with the RISC-V ecosystem. Official specifications and availability timing will be announced in phases.
In its next-generation chip, GenSoC aims for compatibility with the RISC-V ecosystem . By increasing compatibility with an open-standard ISA, the goal is to improve ecosystem scalability, long-term support, and third-party tool compatibility (roadmap stage; official specifications to be released in phases).

